LEADER 00000nam 2200000uu 4500 |
001 13399113783 |
003 ULIBM |
005 20120314072346.0 |
007 co ^g^^^^^ |
008 121122s||||||||th 000 0 tha d |
010 2002074816 |
020 0130891614 |
020 9780130891617 |
020 0131678442 |
020 9780131678446 |
020 0131858394 (Cdrom) |
020 9780131858398 (Cdrom) |
035 (OCoLC)49942790^z(OCoLC)227977470 |
040 DLC^cDLC^dBTCTA^dYDXCP^dIG#^dMYPMP |
042 pcc |
082 00 ^a621.39 ^bMA |
100 1 Ciletti, Michael D |
245 10 Advanced digital design with the Verilog HDL /^cMichael D.Ciletti |
250 1st ed |
260 Upper Saddle River, NJ :^bPrentice Hall,^c2003 |
300 xxi, 982 p. :^bill. ;^c24 cm.^e+ 1 CD-ROM (4 3/4 in.) |
440 0 Prentice Hall Xilinx design series |
504 Includes bibliographical references and index |
650 0 Digital electronics |
650 0 Logic circuits^xComputer-aided design |
650 0 Verilog (Computer hardware description language) |
945 ^p2^l0^i14010448 |
999 ^aคณะวิศวะ (มมส) |